//==============================================================================
// Copyright (c) 2010-2020 Advanced Micro Devices, Inc. All rights reserved.
/// \author AMD Developer Tools Team
/// \file
/// \brief  DX12 counter definitions for GFX103
//==============================================================================

#include "gpa_counter.h"
#include "gpa_hw_counter_gfx103.h"
#include "gpa_hw_exposed_counters_gfx103.h"
#include "gpa_hw_counter_dx12_gfx103.h"

// This file is autogenerated by the ConvertHWEnums project

// clang-format off

namespace counter_dx12_gfx103
{
    using namespace counter_gfx103;

    GPA_HardwareCounterDesc* dx12_counter_group_array_gfx103[] = {
        cpf_counters_gfx103,
        pa_su0_counters_gfx103,
        pa_su1_counters_gfx103,
        pa_su2_counters_gfx103,
        pa_su3_counters_gfx103,
        pa_sc0_counters_gfx103,
        pa_sc1_counters_gfx103,
        pa_sc2_counters_gfx103,
        pa_sc3_counters_gfx103,
        pa_sc4_counters_gfx103,
        pa_sc5_counters_gfx103,
        pa_sc6_counters_gfx103,
        pa_sc7_counters_gfx103,
        pa_sc8_counters_gfx103,
        pa_sc9_counters_gfx103,
        pa_sc10_counters_gfx103,
        pa_sc11_counters_gfx103,
        pa_sc12_counters_gfx103,
        pa_sc13_counters_gfx103,
        pa_sc14_counters_gfx103,
        pa_sc15_counters_gfx103,
        spi0_counters_gfx103,
        spi1_counters_gfx103,
        spi2_counters_gfx103,
        spi3_counters_gfx103,
        sq0_counters_gfx103,
        sq1_counters_gfx103,
        sq2_counters_gfx103,
        sq3_counters_gfx103,
        sq_es0_counters_gfx103,
        sq_es1_counters_gfx103,
        sq_es2_counters_gfx103,
        sq_es3_counters_gfx103,
        sq_gs0_counters_gfx103,
        sq_gs1_counters_gfx103,
        sq_gs2_counters_gfx103,
        sq_gs3_counters_gfx103,
        sq_vs0_counters_gfx103,
        sq_vs1_counters_gfx103,
        sq_vs2_counters_gfx103,
        sq_vs3_counters_gfx103,
        sq_ps0_counters_gfx103,
        sq_ps1_counters_gfx103,
        sq_ps2_counters_gfx103,
        sq_ps3_counters_gfx103,
        sq_ls0_counters_gfx103,
        sq_ls1_counters_gfx103,
        sq_ls2_counters_gfx103,
        sq_ls3_counters_gfx103,
        sq_hs0_counters_gfx103,
        sq_hs1_counters_gfx103,
        sq_hs2_counters_gfx103,
        sq_hs3_counters_gfx103,
        sq_cs0_counters_gfx103,
        sq_cs1_counters_gfx103,
        sq_cs2_counters_gfx103,
        sq_cs3_counters_gfx103,
        sx0_counters_gfx103,
        sx1_counters_gfx103,
        sx2_counters_gfx103,
        sx3_counters_gfx103,
        sx4_counters_gfx103,
        sx5_counters_gfx103,
        sx6_counters_gfx103,
        sx7_counters_gfx103,
        ta0_counters_gfx103,
        ta1_counters_gfx103,
        ta2_counters_gfx103,
        ta3_counters_gfx103,
        ta4_counters_gfx103,
        ta5_counters_gfx103,
        ta6_counters_gfx103,
        ta7_counters_gfx103,
        ta8_counters_gfx103,
        ta9_counters_gfx103,
        ta10_counters_gfx103,
        ta11_counters_gfx103,
        ta12_counters_gfx103,
        ta13_counters_gfx103,
        ta14_counters_gfx103,
        ta15_counters_gfx103,
        ta16_counters_gfx103,
        ta17_counters_gfx103,
        ta18_counters_gfx103,
        ta19_counters_gfx103,
        ta20_counters_gfx103,
        ta21_counters_gfx103,
        ta22_counters_gfx103,
        ta23_counters_gfx103,
        ta24_counters_gfx103,
        ta25_counters_gfx103,
        ta26_counters_gfx103,
        ta27_counters_gfx103,
        ta28_counters_gfx103,
        ta29_counters_gfx103,
        ta30_counters_gfx103,
        ta31_counters_gfx103,
        ta32_counters_gfx103,
        ta33_counters_gfx103,
        ta34_counters_gfx103,
        ta35_counters_gfx103,
        ta36_counters_gfx103,
        ta37_counters_gfx103,
        ta38_counters_gfx103,
        ta39_counters_gfx103,
        ta40_counters_gfx103,
        ta41_counters_gfx103,
        ta42_counters_gfx103,
        ta43_counters_gfx103,
        ta44_counters_gfx103,
        ta45_counters_gfx103,
        ta46_counters_gfx103,
        ta47_counters_gfx103,
        ta48_counters_gfx103,
        ta49_counters_gfx103,
        ta50_counters_gfx103,
        ta51_counters_gfx103,
        ta52_counters_gfx103,
        ta53_counters_gfx103,
        ta54_counters_gfx103,
        ta55_counters_gfx103,
        ta56_counters_gfx103,
        ta57_counters_gfx103,
        ta58_counters_gfx103,
        ta59_counters_gfx103,
        ta60_counters_gfx103,
        ta61_counters_gfx103,
        ta62_counters_gfx103,
        ta63_counters_gfx103,
        ta64_counters_gfx103,
        ta65_counters_gfx103,
        ta66_counters_gfx103,
        ta67_counters_gfx103,
        ta68_counters_gfx103,
        ta69_counters_gfx103,
        ta70_counters_gfx103,
        ta71_counters_gfx103,
        ta72_counters_gfx103,
        ta73_counters_gfx103,
        ta74_counters_gfx103,
        ta75_counters_gfx103,
        ta76_counters_gfx103,
        ta77_counters_gfx103,
        ta78_counters_gfx103,
        ta79_counters_gfx103,
        td0_counters_gfx103,
        td1_counters_gfx103,
        td2_counters_gfx103,
        td3_counters_gfx103,
        td4_counters_gfx103,
        td5_counters_gfx103,
        td6_counters_gfx103,
        td7_counters_gfx103,
        td8_counters_gfx103,
        td9_counters_gfx103,
        td10_counters_gfx103,
        td11_counters_gfx103,
        td12_counters_gfx103,
        td13_counters_gfx103,
        td14_counters_gfx103,
        td15_counters_gfx103,
        td16_counters_gfx103,
        td17_counters_gfx103,
        td18_counters_gfx103,
        td19_counters_gfx103,
        td20_counters_gfx103,
        td21_counters_gfx103,
        td22_counters_gfx103,
        td23_counters_gfx103,
        td24_counters_gfx103,
        td25_counters_gfx103,
        td26_counters_gfx103,
        td27_counters_gfx103,
        td28_counters_gfx103,
        td29_counters_gfx103,
        td30_counters_gfx103,
        td31_counters_gfx103,
        td32_counters_gfx103,
        td33_counters_gfx103,
        td34_counters_gfx103,
        td35_counters_gfx103,
        td36_counters_gfx103,
        td37_counters_gfx103,
        td38_counters_gfx103,
        td39_counters_gfx103,
        td40_counters_gfx103,
        td41_counters_gfx103,
        td42_counters_gfx103,
        td43_counters_gfx103,
        td44_counters_gfx103,
        td45_counters_gfx103,
        td46_counters_gfx103,
        td47_counters_gfx103,
        td48_counters_gfx103,
        td49_counters_gfx103,
        td50_counters_gfx103,
        td51_counters_gfx103,
        td52_counters_gfx103,
        td53_counters_gfx103,
        td54_counters_gfx103,
        td55_counters_gfx103,
        td56_counters_gfx103,
        td57_counters_gfx103,
        td58_counters_gfx103,
        td59_counters_gfx103,
        td60_counters_gfx103,
        td61_counters_gfx103,
        td62_counters_gfx103,
        td63_counters_gfx103,
        td64_counters_gfx103,
        td65_counters_gfx103,
        td66_counters_gfx103,
        td67_counters_gfx103,
        td68_counters_gfx103,
        td69_counters_gfx103,
        td70_counters_gfx103,
        td71_counters_gfx103,
        td72_counters_gfx103,
        td73_counters_gfx103,
        td74_counters_gfx103,
        td75_counters_gfx103,
        td76_counters_gfx103,
        td77_counters_gfx103,
        td78_counters_gfx103,
        td79_counters_gfx103,
        tcp0_counters_gfx103,
        tcp1_counters_gfx103,
        tcp2_counters_gfx103,
        tcp3_counters_gfx103,
        tcp4_counters_gfx103,
        tcp5_counters_gfx103,
        tcp6_counters_gfx103,
        tcp7_counters_gfx103,
        tcp8_counters_gfx103,
        tcp9_counters_gfx103,
        tcp10_counters_gfx103,
        tcp11_counters_gfx103,
        tcp12_counters_gfx103,
        tcp13_counters_gfx103,
        tcp14_counters_gfx103,
        tcp15_counters_gfx103,
        tcp16_counters_gfx103,
        tcp17_counters_gfx103,
        tcp18_counters_gfx103,
        tcp19_counters_gfx103,
        tcp20_counters_gfx103,
        tcp21_counters_gfx103,
        tcp22_counters_gfx103,
        tcp23_counters_gfx103,
        tcp24_counters_gfx103,
        tcp25_counters_gfx103,
        tcp26_counters_gfx103,
        tcp27_counters_gfx103,
        tcp28_counters_gfx103,
        tcp29_counters_gfx103,
        tcp30_counters_gfx103,
        tcp31_counters_gfx103,
        tcp32_counters_gfx103,
        tcp33_counters_gfx103,
        tcp34_counters_gfx103,
        tcp35_counters_gfx103,
        tcp36_counters_gfx103,
        tcp37_counters_gfx103,
        tcp38_counters_gfx103,
        tcp39_counters_gfx103,
        tcp40_counters_gfx103,
        tcp41_counters_gfx103,
        tcp42_counters_gfx103,
        tcp43_counters_gfx103,
        tcp44_counters_gfx103,
        tcp45_counters_gfx103,
        tcp46_counters_gfx103,
        tcp47_counters_gfx103,
        tcp48_counters_gfx103,
        tcp49_counters_gfx103,
        tcp50_counters_gfx103,
        tcp51_counters_gfx103,
        tcp52_counters_gfx103,
        tcp53_counters_gfx103,
        tcp54_counters_gfx103,
        tcp55_counters_gfx103,
        tcp56_counters_gfx103,
        tcp57_counters_gfx103,
        tcp58_counters_gfx103,
        tcp59_counters_gfx103,
        tcp60_counters_gfx103,
        tcp61_counters_gfx103,
        tcp62_counters_gfx103,
        tcp63_counters_gfx103,
        tcp64_counters_gfx103,
        tcp65_counters_gfx103,
        tcp66_counters_gfx103,
        tcp67_counters_gfx103,
        tcp68_counters_gfx103,
        tcp69_counters_gfx103,
        tcp70_counters_gfx103,
        tcp71_counters_gfx103,
        tcp72_counters_gfx103,
        tcp73_counters_gfx103,
        tcp74_counters_gfx103,
        tcp75_counters_gfx103,
        tcp76_counters_gfx103,
        tcp77_counters_gfx103,
        tcp78_counters_gfx103,
        tcp79_counters_gfx103,
        db0_counters_gfx103,
        db1_counters_gfx103,
        db2_counters_gfx103,
        db3_counters_gfx103,
        db4_counters_gfx103,
        db5_counters_gfx103,
        db6_counters_gfx103,
        db7_counters_gfx103,
        db8_counters_gfx103,
        db9_counters_gfx103,
        db10_counters_gfx103,
        db11_counters_gfx103,
        db12_counters_gfx103,
        db13_counters_gfx103,
        db14_counters_gfx103,
        db15_counters_gfx103,
        cb0_counters_gfx103,
        cb1_counters_gfx103,
        cb2_counters_gfx103,
        cb3_counters_gfx103,
        cb4_counters_gfx103,
        cb5_counters_gfx103,
        cb6_counters_gfx103,
        cb7_counters_gfx103,
        cb8_counters_gfx103,
        cb9_counters_gfx103,
        cb10_counters_gfx103,
        cb11_counters_gfx103,
        cb12_counters_gfx103,
        cb13_counters_gfx103,
        cb14_counters_gfx103,
        cb15_counters_gfx103,
        gds_counters_gfx103,
        grbm_counters_gfx103,
        grbmse0_counters_gfx103,
        grbmse1_counters_gfx103,
        grbmse2_counters_gfx103,
        grbmse3_counters_gfx103,
        rlc_counters_gfx103,
        sdma0_counters_gfx103,
        sdma1_counters_gfx103,
        cpg_counters_gfx103,
        cpc_counters_gfx103,
        atc_counters_gfx103,
        atcl2_counters_gfx103,
        mcvml2_counters_gfx103,
        gcea0_counters_gfx103,
        gcea1_counters_gfx103,
        gcea2_counters_gfx103,
        gcea3_counters_gfx103,
        gcea4_counters_gfx103,
        gcea5_counters_gfx103,
        gcea6_counters_gfx103,
        gcea7_counters_gfx103,
        gcea8_counters_gfx103,
        gcea9_counters_gfx103,
        gcea10_counters_gfx103,
        gcea11_counters_gfx103,
        gcea12_counters_gfx103,
        gcea13_counters_gfx103,
        gcea14_counters_gfx103,
        gcea15_counters_gfx103,
        rpb_counters_gfx103,
        rmi0_counters_gfx103,
        rmi1_counters_gfx103,
        rmi2_counters_gfx103,
        rmi3_counters_gfx103,
        rmi4_counters_gfx103,
        rmi5_counters_gfx103,
        rmi6_counters_gfx103,
        rmi7_counters_gfx103,
        rmi8_counters_gfx103,
        rmi9_counters_gfx103,
        rmi10_counters_gfx103,
        rmi11_counters_gfx103,
        rmi12_counters_gfx103,
        rmi13_counters_gfx103,
        rmi14_counters_gfx103,
        rmi15_counters_gfx103,
        rmi16_counters_gfx103,
        rmi17_counters_gfx103,
        rmi18_counters_gfx103,
        rmi19_counters_gfx103,
        rmi20_counters_gfx103,
        rmi21_counters_gfx103,
        rmi22_counters_gfx103,
        rmi23_counters_gfx103,
        rmi24_counters_gfx103,
        rmi25_counters_gfx103,
        rmi26_counters_gfx103,
        rmi27_counters_gfx103,
        rmi28_counters_gfx103,
        rmi29_counters_gfx103,
        rmi30_counters_gfx103,
        rmi31_counters_gfx103,
        umc0_counters_gfx103,
        umc1_counters_gfx103,
        umc2_counters_gfx103,
        umc3_counters_gfx103,
        umc4_counters_gfx103,
        umc5_counters_gfx103,
        umc6_counters_gfx103,
        umc7_counters_gfx103,
        umc8_counters_gfx103,
        umc9_counters_gfx103,
        umc10_counters_gfx103,
        umc11_counters_gfx103,
        umc12_counters_gfx103,
        umc13_counters_gfx103,
        umc14_counters_gfx103,
        umc15_counters_gfx103,
        umc16_counters_gfx103,
        umc17_counters_gfx103,
        umc18_counters_gfx103,
        umc19_counters_gfx103,
        ge_counters_gfx103,
        gl1a0_counters_gfx103,
        gl1a1_counters_gfx103,
        gl1a2_counters_gfx103,
        gl1a3_counters_gfx103,
        gl1a4_counters_gfx103,
        gl1a5_counters_gfx103,
        gl1a6_counters_gfx103,
        gl1a7_counters_gfx103,
        gl1c0_counters_gfx103,
        gl1c1_counters_gfx103,
        gl1c2_counters_gfx103,
        gl1c3_counters_gfx103,
        gl1c4_counters_gfx103,
        gl1c5_counters_gfx103,
        gl1c6_counters_gfx103,
        gl1c7_counters_gfx103,
        gl1c8_counters_gfx103,
        gl1c9_counters_gfx103,
        gl1c10_counters_gfx103,
        gl1c11_counters_gfx103,
        gl1c12_counters_gfx103,
        gl1c13_counters_gfx103,
        gl1c14_counters_gfx103,
        gl1c15_counters_gfx103,
        gl1c16_counters_gfx103,
        gl1c17_counters_gfx103,
        gl1c18_counters_gfx103,
        gl1c19_counters_gfx103,
        gl1c20_counters_gfx103,
        gl1c21_counters_gfx103,
        gl1c22_counters_gfx103,
        gl1c23_counters_gfx103,
        gl1c24_counters_gfx103,
        gl1c25_counters_gfx103,
        gl1c26_counters_gfx103,
        gl1c27_counters_gfx103,
        gl1c28_counters_gfx103,
        gl1c29_counters_gfx103,
        gl1c30_counters_gfx103,
        gl1c31_counters_gfx103,
        gl1cg0_counters_gfx103,
        gl1cg1_counters_gfx103,
        gl1cg2_counters_gfx103,
        gl1cg3_counters_gfx103,
        gl1cg4_counters_gfx103,
        gl1cg5_counters_gfx103,
        gl1cg6_counters_gfx103,
        gl1cg7_counters_gfx103,
        gl1cg8_counters_gfx103,
        gl1cg9_counters_gfx103,
        gl1cg10_counters_gfx103,
        gl1cg11_counters_gfx103,
        gl1cg12_counters_gfx103,
        gl1cg13_counters_gfx103,
        gl1cg14_counters_gfx103,
        gl1cg15_counters_gfx103,
        gl1cg16_counters_gfx103,
        gl1cg17_counters_gfx103,
        gl1cg18_counters_gfx103,
        gl1cg19_counters_gfx103,
        gl1cg20_counters_gfx103,
        gl1cg21_counters_gfx103,
        gl1cg22_counters_gfx103,
        gl1cg23_counters_gfx103,
        gl1cg24_counters_gfx103,
        gl1cg25_counters_gfx103,
        gl1cg26_counters_gfx103,
        gl1cg27_counters_gfx103,
        gl1cg28_counters_gfx103,
        gl1cg29_counters_gfx103,
        gl1cg30_counters_gfx103,
        gl1cg31_counters_gfx103,
        gl2a0_counters_gfx103,
        gl2a1_counters_gfx103,
        gl2a2_counters_gfx103,
        gl2a3_counters_gfx103,
        gl2c0_counters_gfx103,
        gl2c1_counters_gfx103,
        gl2c2_counters_gfx103,
        gl2c3_counters_gfx103,
        gl2c4_counters_gfx103,
        gl2c5_counters_gfx103,
        gl2c6_counters_gfx103,
        gl2c7_counters_gfx103,
        gl2c8_counters_gfx103,
        gl2c9_counters_gfx103,
        gl2c10_counters_gfx103,
        gl2c11_counters_gfx103,
        gl2c12_counters_gfx103,
        gl2c13_counters_gfx103,
        gl2c14_counters_gfx103,
        gl2c15_counters_gfx103,
        cha_counters_gfx103,
        chc0_counters_gfx103,
        chc1_counters_gfx103,
        chc2_counters_gfx103,
        chc3_counters_gfx103,
        chcg_counters_gfx103,
        gus_counters_gfx103,
        gcr_counters_gfx103,
        pa_ph_counters_gfx103,
        utcl10_counters_gfx103,
        utcl11_counters_gfx103,
        utcl12_counters_gfx103,
        utcl13_counters_gfx103,
        utcl14_counters_gfx103,
        utcl15_counters_gfx103,
        utcl16_counters_gfx103,
        utcl17_counters_gfx103,
        ge2_dist_counters_gfx103,
        ge_se0_counters_gfx103,
        ge_se1_counters_gfx103,
        ge_se2_counters_gfx103,
        ge_se3_counters_gfx103,
        gputime_counters_gfx103,
    };

    GPA_HardwareCounterDesc* dx12_exposed_counters_group_array_gfx103[] = {
        cpf_exposed_counters_gfx103,
        pa_su0_exposed_counters_gfx103,
        pa_su1_exposed_counters_gfx103,
        pa_su2_exposed_counters_gfx103,
        pa_su3_exposed_counters_gfx103,
        pa_sc0_exposed_counters_gfx103,
        pa_sc1_exposed_counters_gfx103,
        pa_sc2_exposed_counters_gfx103,
        pa_sc3_exposed_counters_gfx103,
        pa_sc4_exposed_counters_gfx103,
        pa_sc5_exposed_counters_gfx103,
        pa_sc6_exposed_counters_gfx103,
        pa_sc7_exposed_counters_gfx103,
        pa_sc8_exposed_counters_gfx103,
        pa_sc9_exposed_counters_gfx103,
        pa_sc10_exposed_counters_gfx103,
        pa_sc11_exposed_counters_gfx103,
        pa_sc12_exposed_counters_gfx103,
        pa_sc13_exposed_counters_gfx103,
        pa_sc14_exposed_counters_gfx103,
        pa_sc15_exposed_counters_gfx103,
        spi0_exposed_counters_gfx103,
        spi1_exposed_counters_gfx103,
        spi2_exposed_counters_gfx103,
        spi3_exposed_counters_gfx103,
        sq0_exposed_counters_gfx103,
        sq1_exposed_counters_gfx103,
        sq2_exposed_counters_gfx103,
        sq3_exposed_counters_gfx103,
        sq_es0_exposed_counters_gfx103,
        sq_es1_exposed_counters_gfx103,
        sq_es2_exposed_counters_gfx103,
        sq_es3_exposed_counters_gfx103,
        sq_gs0_exposed_counters_gfx103,
        sq_gs1_exposed_counters_gfx103,
        sq_gs2_exposed_counters_gfx103,
        sq_gs3_exposed_counters_gfx103,
        sq_vs0_exposed_counters_gfx103,
        sq_vs1_exposed_counters_gfx103,
        sq_vs2_exposed_counters_gfx103,
        sq_vs3_exposed_counters_gfx103,
        sq_ps0_exposed_counters_gfx103,
        sq_ps1_exposed_counters_gfx103,
        sq_ps2_exposed_counters_gfx103,
        sq_ps3_exposed_counters_gfx103,
        sq_ls0_exposed_counters_gfx103,
        sq_ls1_exposed_counters_gfx103,
        sq_ls2_exposed_counters_gfx103,
        sq_ls3_exposed_counters_gfx103,
        sq_hs0_exposed_counters_gfx103,
        sq_hs1_exposed_counters_gfx103,
        sq_hs2_exposed_counters_gfx103,
        sq_hs3_exposed_counters_gfx103,
        sq_cs0_exposed_counters_gfx103,
        sq_cs1_exposed_counters_gfx103,
        sq_cs2_exposed_counters_gfx103,
        sq_cs3_exposed_counters_gfx103,
        sx0_exposed_counters_gfx103,
        sx1_exposed_counters_gfx103,
        sx2_exposed_counters_gfx103,
        sx3_exposed_counters_gfx103,
        sx4_exposed_counters_gfx103,
        sx5_exposed_counters_gfx103,
        sx6_exposed_counters_gfx103,
        sx7_exposed_counters_gfx103,
        ta0_exposed_counters_gfx103,
        ta1_exposed_counters_gfx103,
        ta2_exposed_counters_gfx103,
        ta3_exposed_counters_gfx103,
        ta4_exposed_counters_gfx103,
        ta5_exposed_counters_gfx103,
        ta6_exposed_counters_gfx103,
        ta7_exposed_counters_gfx103,
        ta8_exposed_counters_gfx103,
        ta9_exposed_counters_gfx103,
        ta10_exposed_counters_gfx103,
        ta11_exposed_counters_gfx103,
        ta12_exposed_counters_gfx103,
        ta13_exposed_counters_gfx103,
        ta14_exposed_counters_gfx103,
        ta15_exposed_counters_gfx103,
        ta16_exposed_counters_gfx103,
        ta17_exposed_counters_gfx103,
        ta18_exposed_counters_gfx103,
        ta19_exposed_counters_gfx103,
        ta20_exposed_counters_gfx103,
        ta21_exposed_counters_gfx103,
        ta22_exposed_counters_gfx103,
        ta23_exposed_counters_gfx103,
        ta24_exposed_counters_gfx103,
        ta25_exposed_counters_gfx103,
        ta26_exposed_counters_gfx103,
        ta27_exposed_counters_gfx103,
        ta28_exposed_counters_gfx103,
        ta29_exposed_counters_gfx103,
        ta30_exposed_counters_gfx103,
        ta31_exposed_counters_gfx103,
        ta32_exposed_counters_gfx103,
        ta33_exposed_counters_gfx103,
        ta34_exposed_counters_gfx103,
        ta35_exposed_counters_gfx103,
        ta36_exposed_counters_gfx103,
        ta37_exposed_counters_gfx103,
        ta38_exposed_counters_gfx103,
        ta39_exposed_counters_gfx103,
        ta40_exposed_counters_gfx103,
        ta41_exposed_counters_gfx103,
        ta42_exposed_counters_gfx103,
        ta43_exposed_counters_gfx103,
        ta44_exposed_counters_gfx103,
        ta45_exposed_counters_gfx103,
        ta46_exposed_counters_gfx103,
        ta47_exposed_counters_gfx103,
        ta48_exposed_counters_gfx103,
        ta49_exposed_counters_gfx103,
        ta50_exposed_counters_gfx103,
        ta51_exposed_counters_gfx103,
        ta52_exposed_counters_gfx103,
        ta53_exposed_counters_gfx103,
        ta54_exposed_counters_gfx103,
        ta55_exposed_counters_gfx103,
        ta56_exposed_counters_gfx103,
        ta57_exposed_counters_gfx103,
        ta58_exposed_counters_gfx103,
        ta59_exposed_counters_gfx103,
        ta60_exposed_counters_gfx103,
        ta61_exposed_counters_gfx103,
        ta62_exposed_counters_gfx103,
        ta63_exposed_counters_gfx103,
        ta64_exposed_counters_gfx103,
        ta65_exposed_counters_gfx103,
        ta66_exposed_counters_gfx103,
        ta67_exposed_counters_gfx103,
        ta68_exposed_counters_gfx103,
        ta69_exposed_counters_gfx103,
        ta70_exposed_counters_gfx103,
        ta71_exposed_counters_gfx103,
        ta72_exposed_counters_gfx103,
        ta73_exposed_counters_gfx103,
        ta74_exposed_counters_gfx103,
        ta75_exposed_counters_gfx103,
        ta76_exposed_counters_gfx103,
        ta77_exposed_counters_gfx103,
        ta78_exposed_counters_gfx103,
        ta79_exposed_counters_gfx103,
        td0_exposed_counters_gfx103,
        td1_exposed_counters_gfx103,
        td2_exposed_counters_gfx103,
        td3_exposed_counters_gfx103,
        td4_exposed_counters_gfx103,
        td5_exposed_counters_gfx103,
        td6_exposed_counters_gfx103,
        td7_exposed_counters_gfx103,
        td8_exposed_counters_gfx103,
        td9_exposed_counters_gfx103,
        td10_exposed_counters_gfx103,
        td11_exposed_counters_gfx103,
        td12_exposed_counters_gfx103,
        td13_exposed_counters_gfx103,
        td14_exposed_counters_gfx103,
        td15_exposed_counters_gfx103,
        td16_exposed_counters_gfx103,
        td17_exposed_counters_gfx103,
        td18_exposed_counters_gfx103,
        td19_exposed_counters_gfx103,
        td20_exposed_counters_gfx103,
        td21_exposed_counters_gfx103,
        td22_exposed_counters_gfx103,
        td23_exposed_counters_gfx103,
        td24_exposed_counters_gfx103,
        td25_exposed_counters_gfx103,
        td26_exposed_counters_gfx103,
        td27_exposed_counters_gfx103,
        td28_exposed_counters_gfx103,
        td29_exposed_counters_gfx103,
        td30_exposed_counters_gfx103,
        td31_exposed_counters_gfx103,
        td32_exposed_counters_gfx103,
        td33_exposed_counters_gfx103,
        td34_exposed_counters_gfx103,
        td35_exposed_counters_gfx103,
        td36_exposed_counters_gfx103,
        td37_exposed_counters_gfx103,
        td38_exposed_counters_gfx103,
        td39_exposed_counters_gfx103,
        td40_exposed_counters_gfx103,
        td41_exposed_counters_gfx103,
        td42_exposed_counters_gfx103,
        td43_exposed_counters_gfx103,
        td44_exposed_counters_gfx103,
        td45_exposed_counters_gfx103,
        td46_exposed_counters_gfx103,
        td47_exposed_counters_gfx103,
        td48_exposed_counters_gfx103,
        td49_exposed_counters_gfx103,
        td50_exposed_counters_gfx103,
        td51_exposed_counters_gfx103,
        td52_exposed_counters_gfx103,
        td53_exposed_counters_gfx103,
        td54_exposed_counters_gfx103,
        td55_exposed_counters_gfx103,
        td56_exposed_counters_gfx103,
        td57_exposed_counters_gfx103,
        td58_exposed_counters_gfx103,
        td59_exposed_counters_gfx103,
        td60_exposed_counters_gfx103,
        td61_exposed_counters_gfx103,
        td62_exposed_counters_gfx103,
        td63_exposed_counters_gfx103,
        td64_exposed_counters_gfx103,
        td65_exposed_counters_gfx103,
        td66_exposed_counters_gfx103,
        td67_exposed_counters_gfx103,
        td68_exposed_counters_gfx103,
        td69_exposed_counters_gfx103,
        td70_exposed_counters_gfx103,
        td71_exposed_counters_gfx103,
        td72_exposed_counters_gfx103,
        td73_exposed_counters_gfx103,
        td74_exposed_counters_gfx103,
        td75_exposed_counters_gfx103,
        td76_exposed_counters_gfx103,
        td77_exposed_counters_gfx103,
        td78_exposed_counters_gfx103,
        td79_exposed_counters_gfx103,
        tcp0_exposed_counters_gfx103,
        tcp1_exposed_counters_gfx103,
        tcp2_exposed_counters_gfx103,
        tcp3_exposed_counters_gfx103,
        tcp4_exposed_counters_gfx103,
        tcp5_exposed_counters_gfx103,
        tcp6_exposed_counters_gfx103,
        tcp7_exposed_counters_gfx103,
        tcp8_exposed_counters_gfx103,
        tcp9_exposed_counters_gfx103,
        tcp10_exposed_counters_gfx103,
        tcp11_exposed_counters_gfx103,
        tcp12_exposed_counters_gfx103,
        tcp13_exposed_counters_gfx103,
        tcp14_exposed_counters_gfx103,
        tcp15_exposed_counters_gfx103,
        tcp16_exposed_counters_gfx103,
        tcp17_exposed_counters_gfx103,
        tcp18_exposed_counters_gfx103,
        tcp19_exposed_counters_gfx103,
        tcp20_exposed_counters_gfx103,
        tcp21_exposed_counters_gfx103,
        tcp22_exposed_counters_gfx103,
        tcp23_exposed_counters_gfx103,
        tcp24_exposed_counters_gfx103,
        tcp25_exposed_counters_gfx103,
        tcp26_exposed_counters_gfx103,
        tcp27_exposed_counters_gfx103,
        tcp28_exposed_counters_gfx103,
        tcp29_exposed_counters_gfx103,
        tcp30_exposed_counters_gfx103,
        tcp31_exposed_counters_gfx103,
        tcp32_exposed_counters_gfx103,
        tcp33_exposed_counters_gfx103,
        tcp34_exposed_counters_gfx103,
        tcp35_exposed_counters_gfx103,
        tcp36_exposed_counters_gfx103,
        tcp37_exposed_counters_gfx103,
        tcp38_exposed_counters_gfx103,
        tcp39_exposed_counters_gfx103,
        tcp40_exposed_counters_gfx103,
        tcp41_exposed_counters_gfx103,
        tcp42_exposed_counters_gfx103,
        tcp43_exposed_counters_gfx103,
        tcp44_exposed_counters_gfx103,
        tcp45_exposed_counters_gfx103,
        tcp46_exposed_counters_gfx103,
        tcp47_exposed_counters_gfx103,
        tcp48_exposed_counters_gfx103,
        tcp49_exposed_counters_gfx103,
        tcp50_exposed_counters_gfx103,
        tcp51_exposed_counters_gfx103,
        tcp52_exposed_counters_gfx103,
        tcp53_exposed_counters_gfx103,
        tcp54_exposed_counters_gfx103,
        tcp55_exposed_counters_gfx103,
        tcp56_exposed_counters_gfx103,
        tcp57_exposed_counters_gfx103,
        tcp58_exposed_counters_gfx103,
        tcp59_exposed_counters_gfx103,
        tcp60_exposed_counters_gfx103,
        tcp61_exposed_counters_gfx103,
        tcp62_exposed_counters_gfx103,
        tcp63_exposed_counters_gfx103,
        tcp64_exposed_counters_gfx103,
        tcp65_exposed_counters_gfx103,
        tcp66_exposed_counters_gfx103,
        tcp67_exposed_counters_gfx103,
        tcp68_exposed_counters_gfx103,
        tcp69_exposed_counters_gfx103,
        tcp70_exposed_counters_gfx103,
        tcp71_exposed_counters_gfx103,
        tcp72_exposed_counters_gfx103,
        tcp73_exposed_counters_gfx103,
        tcp74_exposed_counters_gfx103,
        tcp75_exposed_counters_gfx103,
        tcp76_exposed_counters_gfx103,
        tcp77_exposed_counters_gfx103,
        tcp78_exposed_counters_gfx103,
        tcp79_exposed_counters_gfx103,
        db0_exposed_counters_gfx103,
        db1_exposed_counters_gfx103,
        db2_exposed_counters_gfx103,
        db3_exposed_counters_gfx103,
        db4_exposed_counters_gfx103,
        db5_exposed_counters_gfx103,
        db6_exposed_counters_gfx103,
        db7_exposed_counters_gfx103,
        db8_exposed_counters_gfx103,
        db9_exposed_counters_gfx103,
        db10_exposed_counters_gfx103,
        db11_exposed_counters_gfx103,
        db12_exposed_counters_gfx103,
        db13_exposed_counters_gfx103,
        db14_exposed_counters_gfx103,
        db15_exposed_counters_gfx103,
        cb0_exposed_counters_gfx103,
        cb1_exposed_counters_gfx103,
        cb2_exposed_counters_gfx103,
        cb3_exposed_counters_gfx103,
        cb4_exposed_counters_gfx103,
        cb5_exposed_counters_gfx103,
        cb6_exposed_counters_gfx103,
        cb7_exposed_counters_gfx103,
        cb8_exposed_counters_gfx103,
        cb9_exposed_counters_gfx103,
        cb10_exposed_counters_gfx103,
        cb11_exposed_counters_gfx103,
        cb12_exposed_counters_gfx103,
        cb13_exposed_counters_gfx103,
        cb14_exposed_counters_gfx103,
        cb15_exposed_counters_gfx103,
        grbm_exposed_counters_gfx103,
        gcea0_exposed_counters_gfx103,
        gcea1_exposed_counters_gfx103,
        gcea2_exposed_counters_gfx103,
        gcea3_exposed_counters_gfx103,
        gcea4_exposed_counters_gfx103,
        gcea5_exposed_counters_gfx103,
        gcea6_exposed_counters_gfx103,
        gcea7_exposed_counters_gfx103,
        gcea8_exposed_counters_gfx103,
        gcea9_exposed_counters_gfx103,
        gcea10_exposed_counters_gfx103,
        gcea11_exposed_counters_gfx103,
        gcea12_exposed_counters_gfx103,
        gcea13_exposed_counters_gfx103,
        gcea14_exposed_counters_gfx103,
        gcea15_exposed_counters_gfx103,
        gl1c0_exposed_counters_gfx103,
        gl1c1_exposed_counters_gfx103,
        gl1c2_exposed_counters_gfx103,
        gl1c3_exposed_counters_gfx103,
        gl1c4_exposed_counters_gfx103,
        gl1c5_exposed_counters_gfx103,
        gl1c6_exposed_counters_gfx103,
        gl1c7_exposed_counters_gfx103,
        gl1c8_exposed_counters_gfx103,
        gl1c9_exposed_counters_gfx103,
        gl1c10_exposed_counters_gfx103,
        gl1c11_exposed_counters_gfx103,
        gl1c12_exposed_counters_gfx103,
        gl1c13_exposed_counters_gfx103,
        gl1c14_exposed_counters_gfx103,
        gl1c15_exposed_counters_gfx103,
        gl1c16_exposed_counters_gfx103,
        gl1c17_exposed_counters_gfx103,
        gl1c18_exposed_counters_gfx103,
        gl1c19_exposed_counters_gfx103,
        gl1c20_exposed_counters_gfx103,
        gl1c21_exposed_counters_gfx103,
        gl1c22_exposed_counters_gfx103,
        gl1c23_exposed_counters_gfx103,
        gl1c24_exposed_counters_gfx103,
        gl1c25_exposed_counters_gfx103,
        gl1c26_exposed_counters_gfx103,
        gl1c27_exposed_counters_gfx103,
        gl1c28_exposed_counters_gfx103,
        gl1c29_exposed_counters_gfx103,
        gl1c30_exposed_counters_gfx103,
        gl1c31_exposed_counters_gfx103,
        gl2c0_exposed_counters_gfx103,
        gl2c1_exposed_counters_gfx103,
        gl2c2_exposed_counters_gfx103,
        gl2c3_exposed_counters_gfx103,
        gl2c4_exposed_counters_gfx103,
        gl2c5_exposed_counters_gfx103,
        gl2c6_exposed_counters_gfx103,
        gl2c7_exposed_counters_gfx103,
        gl2c8_exposed_counters_gfx103,
        gl2c9_exposed_counters_gfx103,
        gl2c10_exposed_counters_gfx103,
        gl2c11_exposed_counters_gfx103,
        gl2c12_exposed_counters_gfx103,
        gl2c13_exposed_counters_gfx103,
        gl2c14_exposed_counters_gfx103,
        gl2c15_exposed_counters_gfx103,
        ge_se0_exposed_counters_gfx103,
        ge_se1_exposed_counters_gfx103,
        ge_se2_exposed_counters_gfx103,
        ge_se3_exposed_counters_gfx103,
        gputime_exposed_counters_gfx103,
    };

    GPA_CounterGroupDesc hw_dx12_groups_gfx103[] = {
        {0, "CPF", 0, 40, 2, 0},
        {1, "PA_SU0", 0, 276, 4, 0},
        {2, "PA_SU1", 1, 276, 4, 0},
        {3, "PA_SU2", 2, 276, 4, 0},
        {4, "PA_SU3", 3, 276, 4, 0},
        {5, "PA_SC0", 0, 578, 8, 0},
        {6, "PA_SC1", 1, 578, 8, 0},
        {7, "PA_SC2", 2, 578, 8, 0},
        {8, "PA_SC3", 3, 578, 8, 0},
        {9, "PA_SC4", 4, 578, 8, 0},
        {10, "PA_SC5", 5, 578, 8, 0},
        {11, "PA_SC6", 6, 578, 8, 0},
        {12, "PA_SC7", 7, 578, 8, 0},
        {13, "PA_SC8", 8, 578, 8, 0},
        {14, "PA_SC9", 9, 578, 8, 0},
        {15, "PA_SC10", 10, 578, 8, 0},
        {16, "PA_SC11", 11, 578, 8, 0},
        {17, "PA_SC12", 12, 578, 8, 0},
        {18, "PA_SC13", 13, 578, 8, 0},
        {19, "PA_SC14", 14, 578, 8, 0},
        {20, "PA_SC15", 15, 578, 8, 0},
        {21, "SPI0", 0, 332, 6, 0},
        {22, "SPI1", 1, 332, 6, 0},
        {23, "SPI2", 2, 332, 6, 0},
        {24, "SPI3", 3, 332, 6, 0},
        {25, "SQ0", 0, 512, 16, 0},
        {26, "SQ1", 1, 512, 16, 0},
        {27, "SQ2", 2, 512, 16, 0},
        {28, "SQ3", 3, 512, 16, 0},
        {29, "SQ_ES0", 0, 512, 16, 0},
        {30, "SQ_ES1", 1, 512, 16, 0},
        {31, "SQ_ES2", 2, 512, 16, 0},
        {32, "SQ_ES3", 3, 512, 16, 0},
        {33, "SQ_GS0", 0, 512, 16, 0},
        {34, "SQ_GS1", 1, 512, 16, 0},
        {35, "SQ_GS2", 2, 512, 16, 0},
        {36, "SQ_GS3", 3, 512, 16, 0},
        {37, "SQ_VS0", 0, 512, 16, 0},
        {38, "SQ_VS1", 1, 512, 16, 0},
        {39, "SQ_VS2", 2, 512, 16, 0},
        {40, "SQ_VS3", 3, 512, 16, 0},
        {41, "SQ_PS0", 0, 512, 16, 0},
        {42, "SQ_PS1", 1, 512, 16, 0},
        {43, "SQ_PS2", 2, 512, 16, 0},
        {44, "SQ_PS3", 3, 512, 16, 0},
        {45, "SQ_LS0", 0, 512, 16, 0},
        {46, "SQ_LS1", 1, 512, 16, 0},
        {47, "SQ_LS2", 2, 512, 16, 0},
        {48, "SQ_LS3", 3, 512, 16, 0},
        {49, "SQ_HS0", 0, 512, 16, 0},
        {50, "SQ_HS1", 1, 512, 16, 0},
        {51, "SQ_HS2", 2, 512, 16, 0},
        {52, "SQ_HS3", 3, 512, 16, 0},
        {53, "SQ_CS0", 0, 512, 16, 0},
        {54, "SQ_CS1", 1, 512, 16, 0},
        {55, "SQ_CS2", 2, 512, 16, 0},
        {56, "SQ_CS3", 3, 512, 16, 0},
        {57, "SX0", 0, 225, 4, 0},
        {58, "SX1", 1, 225, 4, 0},
        {59, "SX2", 2, 225, 4, 0},
        {60, "SX3", 3, 225, 4, 0},
        {61, "SX4", 4, 225, 4, 0},
        {62, "SX5", 5, 225, 4, 0},
        {63, "SX6", 6, 225, 4, 0},
        {64, "SX7", 7, 225, 4, 0},
        {65, "TA0", 0, 236, 2, 0},
        {66, "TA1", 1, 236, 2, 0},
        {67, "TA2", 2, 236, 2, 0},
        {68, "TA3", 3, 236, 2, 0},
        {69, "TA4", 4, 236, 2, 0},
        {70, "TA5", 5, 236, 2, 0},
        {71, "TA6", 6, 236, 2, 0},
        {72, "TA7", 7, 236, 2, 0},
        {73, "TA8", 8, 236, 2, 0},
        {74, "TA9", 9, 236, 2, 0},
        {75, "TA10", 10, 236, 2, 0},
        {76, "TA11", 11, 236, 2, 0},
        {77, "TA12", 12, 236, 2, 0},
        {78, "TA13", 13, 236, 2, 0},
        {79, "TA14", 14, 236, 2, 0},
        {80, "TA15", 15, 236, 2, 0},
        {81, "TA16", 16, 236, 2, 0},
        {82, "TA17", 17, 236, 2, 0},
        {83, "TA18", 18, 236, 2, 0},
        {84, "TA19", 19, 236, 2, 0},
        {85, "TA20", 20, 236, 2, 0},
        {86, "TA21", 21, 236, 2, 0},
        {87, "TA22", 22, 236, 2, 0},
        {88, "TA23", 23, 236, 2, 0},
        {89, "TA24", 24, 236, 2, 0},
        {90, "TA25", 25, 236, 2, 0},
        {91, "TA26", 26, 236, 2, 0},
        {92, "TA27", 27, 236, 2, 0},
        {93, "TA28", 28, 236, 2, 0},
        {94, "TA29", 29, 236, 2, 0},
        {95, "TA30", 30, 236, 2, 0},
        {96, "TA31", 31, 236, 2, 0},
        {97, "TA32", 32, 236, 2, 0},
        {98, "TA33", 33, 236, 2, 0},
        {99, "TA34", 34, 236, 2, 0},
        {100, "TA35", 35, 236, 2, 0},
        {101, "TA36", 36, 236, 2, 0},
        {102, "TA37", 37, 236, 2, 0},
        {103, "TA38", 38, 236, 2, 0},
        {104, "TA39", 39, 236, 2, 0},
        {105, "TA40", 40, 236, 2, 0},
        {106, "TA41", 41, 236, 2, 0},
        {107, "TA42", 42, 236, 2, 0},
        {108, "TA43", 43, 236, 2, 0},
        {109, "TA44", 44, 236, 2, 0},
        {110, "TA45", 45, 236, 2, 0},
        {111, "TA46", 46, 236, 2, 0},
        {112, "TA47", 47, 236, 2, 0},
        {113, "TA48", 48, 236, 2, 0},
        {114, "TA49", 49, 236, 2, 0},
        {115, "TA50", 50, 236, 2, 0},
        {116, "TA51", 51, 236, 2, 0},
        {117, "TA52", 52, 236, 2, 0},
        {118, "TA53", 53, 236, 2, 0},
        {119, "TA54", 54, 236, 2, 0},
        {120, "TA55", 55, 236, 2, 0},
        {121, "TA56", 56, 236, 2, 0},
        {122, "TA57", 57, 236, 2, 0},
        {123, "TA58", 58, 236, 2, 0},
        {124, "TA59", 59, 236, 2, 0},
        {125, "TA60", 60, 236, 2, 0},
        {126, "TA61", 61, 236, 2, 0},
        {127, "TA62", 62, 236, 2, 0},
        {128, "TA63", 63, 236, 2, 0},
        {129, "TA64", 64, 236, 2, 0},
        {130, "TA65", 65, 236, 2, 0},
        {131, "TA66", 66, 236, 2, 0},
        {132, "TA67", 67, 236, 2, 0},
        {133, "TA68", 68, 236, 2, 0},
        {134, "TA69", 69, 236, 2, 0},
        {135, "TA70", 70, 236, 2, 0},
        {136, "TA71", 71, 236, 2, 0},
        {137, "TA72", 72, 236, 2, 0},
        {138, "TA73", 73, 236, 2, 0},
        {139, "TA74", 74, 236, 2, 0},
        {140, "TA75", 75, 236, 2, 0},
        {141, "TA76", 76, 236, 2, 0},
        {142, "TA77", 77, 236, 2, 0},
        {143, "TA78", 78, 236, 2, 0},
        {144, "TA79", 79, 236, 2, 0},
        {145, "TD0", 0, 192, 2, 0},
        {146, "TD1", 1, 192, 2, 0},
        {147, "TD2", 2, 192, 2, 0},
        {148, "TD3", 3, 192, 2, 0},
        {149, "TD4", 4, 192, 2, 0},
        {150, "TD5", 5, 192, 2, 0},
        {151, "TD6", 6, 192, 2, 0},
        {152, "TD7", 7, 192, 2, 0},
        {153, "TD8", 8, 192, 2, 0},
        {154, "TD9", 9, 192, 2, 0},
        {155, "TD10", 10, 192, 2, 0},
        {156, "TD11", 11, 192, 2, 0},
        {157, "TD12", 12, 192, 2, 0},
        {158, "TD13", 13, 192, 2, 0},
        {159, "TD14", 14, 192, 2, 0},
        {160, "TD15", 15, 192, 2, 0},
        {161, "TD16", 16, 192, 2, 0},
        {162, "TD17", 17, 192, 2, 0},
        {163, "TD18", 18, 192, 2, 0},
        {164, "TD19", 19, 192, 2, 0},
        {165, "TD20", 20, 192, 2, 0},
        {166, "TD21", 21, 192, 2, 0},
        {167, "TD22", 22, 192, 2, 0},
        {168, "TD23", 23, 192, 2, 0},
        {169, "TD24", 24, 192, 2, 0},
        {170, "TD25", 25, 192, 2, 0},
        {171, "TD26", 26, 192, 2, 0},
        {172, "TD27", 27, 192, 2, 0},
        {173, "TD28", 28, 192, 2, 0},
        {174, "TD29", 29, 192, 2, 0},
        {175, "TD30", 30, 192, 2, 0},
        {176, "TD31", 31, 192, 2, 0},
        {177, "TD32", 32, 192, 2, 0},
        {178, "TD33", 33, 192, 2, 0},
        {179, "TD34", 34, 192, 2, 0},
        {180, "TD35", 35, 192, 2, 0},
        {181, "TD36", 36, 192, 2, 0},
        {182, "TD37", 37, 192, 2, 0},
        {183, "TD38", 38, 192, 2, 0},
        {184, "TD39", 39, 192, 2, 0},
        {185, "TD40", 40, 192, 2, 0},
        {186, "TD41", 41, 192, 2, 0},
        {187, "TD42", 42, 192, 2, 0},
        {188, "TD43", 43, 192, 2, 0},
        {189, "TD44", 44, 192, 2, 0},
        {190, "TD45", 45, 192, 2, 0},
        {191, "TD46", 46, 192, 2, 0},
        {192, "TD47", 47, 192, 2, 0},
        {193, "TD48", 48, 192, 2, 0},
        {194, "TD49", 49, 192, 2, 0},
        {195, "TD50", 50, 192, 2, 0},
        {196, "TD51", 51, 192, 2, 0},
        {197, "TD52", 52, 192, 2, 0},
        {198, "TD53", 53, 192, 2, 0},
        {199, "TD54", 54, 192, 2, 0},
        {200, "TD55", 55, 192, 2, 0},
        {201, "TD56", 56, 192, 2, 0},
        {202, "TD57", 57, 192, 2, 0},
        {203, "TD58", 58, 192, 2, 0},
        {204, "TD59", 59, 192, 2, 0},
        {205, "TD60", 60, 192, 2, 0},
        {206, "TD61", 61, 192, 2, 0},
        {207, "TD62", 62, 192, 2, 0},
        {208, "TD63", 63, 192, 2, 0},
        {209, "TD64", 64, 192, 2, 0},
        {210, "TD65", 65, 192, 2, 0},
        {211, "TD66", 66, 192, 2, 0},
        {212, "TD67", 67, 192, 2, 0},
        {213, "TD68", 68, 192, 2, 0},
        {214, "TD69", 69, 192, 2, 0},
        {215, "TD70", 70, 192, 2, 0},
        {216, "TD71", 71, 192, 2, 0},
        {217, "TD72", 72, 192, 2, 0},
        {218, "TD73", 73, 192, 2, 0},
        {219, "TD74", 74, 192, 2, 0},
        {220, "TD75", 75, 192, 2, 0},
        {221, "TD76", 76, 192, 2, 0},
        {222, "TD77", 77, 192, 2, 0},
        {223, "TD78", 78, 192, 2, 0},
        {224, "TD79", 79, 192, 2, 0},
        {225, "TCP0", 0, 77, 4, 0},
        {226, "TCP1", 1, 77, 4, 0},
        {227, "TCP2", 2, 77, 4, 0},
        {228, "TCP3", 3, 77, 4, 0},
        {229, "TCP4", 4, 77, 4, 0},
        {230, "TCP5", 5, 77, 4, 0},
        {231, "TCP6", 6, 77, 4, 0},
        {232, "TCP7", 7, 77, 4, 0},
        {233, "TCP8", 8, 77, 4, 0},
        {234, "TCP9", 9, 77, 4, 0},
        {235, "TCP10", 10, 77, 4, 0},
        {236, "TCP11", 11, 77, 4, 0},
        {237, "TCP12", 12, 77, 4, 0},
        {238, "TCP13", 13, 77, 4, 0},
        {239, "TCP14", 14, 77, 4, 0},
        {240, "TCP15", 15, 77, 4, 0},
        {241, "TCP16", 16, 77, 4, 0},
        {242, "TCP17", 17, 77, 4, 0},
        {243, "TCP18", 18, 77, 4, 0},
        {244, "TCP19", 19, 77, 4, 0},
        {245, "TCP20", 20, 77, 4, 0},
        {246, "TCP21", 21, 77, 4, 0},
        {247, "TCP22", 22, 77, 4, 0},
        {248, "TCP23", 23, 77, 4, 0},
        {249, "TCP24", 24, 77, 4, 0},
        {250, "TCP25", 25, 77, 4, 0},
        {251, "TCP26", 26, 77, 4, 0},
        {252, "TCP27", 27, 77, 4, 0},
        {253, "TCP28", 28, 77, 4, 0},
        {254, "TCP29", 29, 77, 4, 0},
        {255, "TCP30", 30, 77, 4, 0},
        {256, "TCP31", 31, 77, 4, 0},
        {257, "TCP32", 32, 77, 4, 0},
        {258, "TCP33", 33, 77, 4, 0},
        {259, "TCP34", 34, 77, 4, 0},
        {260, "TCP35", 35, 77, 4, 0},
        {261, "TCP36", 36, 77, 4, 0},
        {262, "TCP37", 37, 77, 4, 0},
        {263, "TCP38", 38, 77, 4, 0},
        {264, "TCP39", 39, 77, 4, 0},
        {265, "TCP40", 40, 77, 4, 0},
        {266, "TCP41", 41, 77, 4, 0},
        {267, "TCP42", 42, 77, 4, 0},
        {268, "TCP43", 43, 77, 4, 0},
        {269, "TCP44", 44, 77, 4, 0},
        {270, "TCP45", 45, 77, 4, 0},
        {271, "TCP46", 46, 77, 4, 0},
        {272, "TCP47", 47, 77, 4, 0},
        {273, "TCP48", 48, 77, 4, 0},
        {274, "TCP49", 49, 77, 4, 0},
        {275, "TCP50", 50, 77, 4, 0},
        {276, "TCP51", 51, 77, 4, 0},
        {277, "TCP52", 52, 77, 4, 0},
        {278, "TCP53", 53, 77, 4, 0},
        {279, "TCP54", 54, 77, 4, 0},
        {280, "TCP55", 55, 77, 4, 0},
        {281, "TCP56", 56, 77, 4, 0},
        {282, "TCP57", 57, 77, 4, 0},
        {283, "TCP58", 58, 77, 4, 0},
        {284, "TCP59", 59, 77, 4, 0},
        {285, "TCP60", 60, 77, 4, 0},
        {286, "TCP61", 61, 77, 4, 0},
        {287, "TCP62", 62, 77, 4, 0},
        {288, "TCP63", 63, 77, 4, 0},
        {289, "TCP64", 64, 77, 4, 0},
        {290, "TCP65", 65, 77, 4, 0},
        {291, "TCP66", 66, 77, 4, 0},
        {292, "TCP67", 67, 77, 4, 0},
        {293, "TCP68", 68, 77, 4, 0},
        {294, "TCP69", 69, 77, 4, 0},
        {295, "TCP70", 70, 77, 4, 0},
        {296, "TCP71", 71, 77, 4, 0},
        {297, "TCP72", 72, 77, 4, 0},
        {298, "TCP73", 73, 77, 4, 0},
        {299, "TCP74", 74, 77, 4, 0},
        {300, "TCP75", 75, 77, 4, 0},
        {301, "TCP76", 76, 77, 4, 0},
        {302, "TCP77", 77, 77, 4, 0},
        {303, "TCP78", 78, 77, 4, 0},
        {304, "TCP79", 79, 77, 4, 0},
        {305, "DB0", 0, 391, 4, 0},
        {306, "DB1", 1, 391, 4, 0},
        {307, "DB2", 2, 391, 4, 0},
        {308, "DB3", 3, 391, 4, 0},
        {309, "DB4", 4, 391, 4, 0},
        {310, "DB5", 5, 391, 4, 0},
        {311, "DB6", 6, 391, 4, 0},
        {312, "DB7", 7, 391, 4, 0},
        {313, "DB8", 8, 391, 4, 0},
        {314, "DB9", 9, 391, 4, 0},
        {315, "DB10", 10, 391, 4, 0},
        {316, "DB11", 11, 391, 4, 0},
        {317, "DB12", 12, 391, 4, 0},
        {318, "DB13", 13, 391, 4, 0},
        {319, "DB14", 14, 391, 4, 0},
        {320, "DB15", 15, 391, 4, 0},
        {321, "CB0", 0, 461, 4, 0},
        {322, "CB1", 1, 461, 4, 0},
        {323, "CB2", 2, 461, 4, 0},
        {324, "CB3", 3, 461, 4, 0},
        {325, "CB4", 4, 461, 4, 0},
        {326, "CB5", 5, 461, 4, 0},
        {327, "CB6", 6, 461, 4, 0},
        {328, "CB7", 7, 461, 4, 0},
        {329, "CB8", 8, 461, 4, 0},
        {330, "CB9", 9, 461, 4, 0},
        {331, "CB10", 10, 461, 4, 0},
        {332, "CB11", 11, 461, 4, 0},
        {333, "CB12", 12, 461, 4, 0},
        {334, "CB13", 13, 461, 4, 0},
        {335, "CB14", 14, 461, 4, 0},
        {336, "CB15", 15, 461, 4, 0},
        {337, "GDS", 0, 123, 4, 0},
        {338, "GRBM", 0, 47, 2, 0},
        {339, "GRBMSE0", 0, 19, 4, 0},
        {340, "GRBMSE1", 1, 19, 4, 0},
        {341, "GRBMSE2", 2, 19, 4, 0},
        {342, "GRBMSE3", 3, 19, 4, 0},
        {343, "RLC", 0, 7, 2, 0},
        {344, "SDMA0", 0, 128, 2, 0},
        {345, "SDMA1", 1, 128, 2, 0},
        {346, "CPG", 0, 82, 2, 0},
        {347, "CPC", 0, 47, 2, 0},
        {348, "ATC", 0, 24, 4, 0},
        {349, "ATCL2", 0, 12, 2, 0},
        {350, "MCVML2", 0, 91, 8, 0},
        {351, "GCEA0", 0, 90, 2, 0},
        {352, "GCEA1", 1, 90, 2, 0},
        {353, "GCEA2", 2, 90, 2, 0},
        {354, "GCEA3", 3, 90, 2, 0},
        {355, "GCEA4", 4, 90, 2, 0},
        {356, "GCEA5", 5, 90, 2, 0},
        {357, "GCEA6", 6, 90, 2, 0},
        {358, "GCEA7", 7, 90, 2, 0},
        {359, "GCEA8", 8, 90, 2, 0},
        {360, "GCEA9", 9, 90, 2, 0},
        {361, "GCEA10", 10, 90, 2, 0},
        {362, "GCEA11", 11, 90, 2, 0},
        {363, "GCEA12", 12, 90, 2, 0},
        {364, "GCEA13", 13, 90, 2, 0},
        {365, "GCEA14", 14, 90, 2, 0},
        {366, "GCEA15", 15, 90, 2, 0},
        {367, "RPB", 0, 63, 4, 0},
        {368, "RMI0", 0, 258, 4, 0},
        {369, "RMI1", 1, 258, 4, 0},
        {370, "RMI2", 2, 258, 4, 0},
        {371, "RMI3", 3, 258, 4, 0},
        {372, "RMI4", 4, 258, 4, 0},
        {373, "RMI5", 5, 258, 4, 0},
        {374, "RMI6", 6, 258, 4, 0},
        {375, "RMI7", 7, 258, 4, 0},
        {376, "RMI8", 8, 258, 4, 0},
        {377, "RMI9", 9, 258, 4, 0},
        {378, "RMI10", 10, 258, 4, 0},
        {379, "RMI11", 11, 258, 4, 0},
        {380, "RMI12", 12, 258, 4, 0},
        {381, "RMI13", 13, 258, 4, 0},
        {382, "RMI14", 14, 258, 4, 0},
        {383, "RMI15", 15, 258, 4, 0},
        {384, "RMI16", 16, 258, 4, 0},
        {385, "RMI17", 17, 258, 4, 0},
        {386, "RMI18", 18, 258, 4, 0},
        {387, "RMI19", 19, 258, 4, 0},
        {388, "RMI20", 20, 258, 4, 0},
        {389, "RMI21", 21, 258, 4, 0},
        {390, "RMI22", 22, 258, 4, 0},
        {391, "RMI23", 23, 258, 4, 0},
        {392, "RMI24", 24, 258, 4, 0},
        {393, "RMI25", 25, 258, 4, 0},
        {394, "RMI26", 26, 258, 4, 0},
        {395, "RMI27", 27, 258, 4, 0},
        {396, "RMI28", 28, 258, 4, 0},
        {397, "RMI29", 29, 258, 4, 0},
        {398, "RMI30", 30, 258, 4, 0},
        {399, "RMI31", 31, 258, 4, 0},
        {400, "UMC0", 0, 40, 5, 0},
        {401, "UMC1", 1, 40, 5, 0},
        {402, "UMC2", 2, 40, 5, 0},
        {403, "UMC3", 3, 40, 5, 0},
        {404, "UMC4", 4, 40, 5, 0},
        {405, "UMC5", 5, 40, 5, 0},
        {406, "UMC6", 6, 40, 5, 0},
        {407, "UMC7", 7, 40, 5, 0},
        {408, "UMC8", 8, 40, 5, 0},
        {409, "UMC9", 9, 40, 5, 0},
        {410, "UMC10", 10, 40, 5, 0},
        {411, "UMC11", 11, 40, 5, 0},
        {412, "UMC12", 12, 40, 5, 0},
        {413, "UMC13", 13, 40, 5, 0},
        {414, "UMC14", 14, 40, 5, 0},
        {415, "UMC15", 15, 40, 5, 0},
        {416, "UMC16", 16, 40, 5, 0},
        {417, "UMC17", 17, 40, 5, 0},
        {418, "UMC18", 18, 40, 5, 0},
        {419, "UMC19", 19, 40, 5, 0},
        {420, "GE", 0, 40, 4, 0},
        {421, "GL1A0", 0, 36, 4, 0},
        {422, "GL1A1", 1, 36, 4, 0},
        {423, "GL1A2", 2, 36, 4, 0},
        {424, "GL1A3", 3, 36, 4, 0},
        {425, "GL1A4", 4, 36, 4, 0},
        {426, "GL1A5", 5, 36, 4, 0},
        {427, "GL1A6", 6, 36, 4, 0},
        {428, "GL1A7", 7, 36, 4, 0},
        {429, "GL1C0", 0, 83, 4, 0},
        {430, "GL1C1", 1, 83, 4, 0},
        {431, "GL1C2", 2, 83, 4, 0},
        {432, "GL1C3", 3, 83, 4, 0},
        {433, "GL1C4", 4, 83, 4, 0},
        {434, "GL1C5", 5, 83, 4, 0},
        {435, "GL1C6", 6, 83, 4, 0},
        {436, "GL1C7", 7, 83, 4, 0},
        {437, "GL1C8", 8, 83, 4, 0},
        {438, "GL1C9", 9, 83, 4, 0},
        {439, "GL1C10", 10, 83, 4, 0},
        {440, "GL1C11", 11, 83, 4, 0},
        {441, "GL1C12", 12, 83, 4, 0},
        {442, "GL1C13", 13, 83, 4, 0},
        {443, "GL1C14", 14, 83, 4, 0},
        {444, "GL1C15", 15, 83, 4, 0},
        {445, "GL1C16", 16, 83, 4, 0},
        {446, "GL1C17", 17, 83, 4, 0},
        {447, "GL1C18", 18, 83, 4, 0},
        {448, "GL1C19", 19, 83, 4, 0},
        {449, "GL1C20", 20, 83, 4, 0},
        {450, "GL1C21", 21, 83, 4, 0},
        {451, "GL1C22", 22, 83, 4, 0},
        {452, "GL1C23", 23, 83, 4, 0},
        {453, "GL1C24", 24, 83, 4, 0},
        {454, "GL1C25", 25, 83, 4, 0},
        {455, "GL1C26", 26, 83, 4, 0},
        {456, "GL1C27", 27, 83, 4, 0},
        {457, "GL1C28", 28, 83, 4, 0},
        {458, "GL1C29", 29, 83, 4, 0},
        {459, "GL1C30", 30, 83, 4, 0},
        {460, "GL1C31", 31, 83, 4, 0},
        {461, "GL1CG0", 0, 38, 4, 0},
        {462, "GL1CG1", 1, 38, 4, 0},
        {463, "GL1CG2", 2, 38, 4, 0},
        {464, "GL1CG3", 3, 38, 4, 0},
        {465, "GL1CG4", 4, 38, 4, 0},
        {466, "GL1CG5", 5, 38, 4, 0},
        {467, "GL1CG6", 6, 38, 4, 0},
        {468, "GL1CG7", 7, 38, 4, 0},
        {469, "GL1CG8", 8, 38, 4, 0},
        {470, "GL1CG9", 9, 38, 4, 0},
        {471, "GL1CG10", 10, 38, 4, 0},
        {472, "GL1CG11", 11, 38, 4, 0},
        {473, "GL1CG12", 12, 38, 4, 0},
        {474, "GL1CG13", 13, 38, 4, 0},
        {475, "GL1CG14", 14, 38, 4, 0},
        {476, "GL1CG15", 15, 38, 4, 0},
        {477, "GL1CG16", 16, 38, 4, 0},
        {478, "GL1CG17", 17, 38, 4, 0},
        {479, "GL1CG18", 18, 38, 4, 0},
        {480, "GL1CG19", 19, 38, 4, 0},
        {481, "GL1CG20", 20, 38, 4, 0},
        {482, "GL1CG21", 21, 38, 4, 0},
        {483, "GL1CG22", 22, 38, 4, 0},
        {484, "GL1CG23", 23, 38, 4, 0},
        {485, "GL1CG24", 24, 38, 4, 0},
        {486, "GL1CG25", 25, 38, 4, 0},
        {487, "GL1CG26", 26, 38, 4, 0},
        {488, "GL1CG27", 27, 38, 4, 0},
        {489, "GL1CG28", 28, 38, 4, 0},
        {490, "GL1CG29", 29, 38, 4, 0},
        {491, "GL1CG30", 30, 38, 4, 0},
        {492, "GL1CG31", 31, 38, 4, 0},
        {493, "GL2A0", 0, 91, 4, 0},
        {494, "GL2A1", 1, 91, 4, 0},
        {495, "GL2A2", 2, 91, 4, 0},
        {496, "GL2A3", 3, 91, 4, 0},
        {497, "GL2C0", 0, 254, 4, 0},
        {498, "GL2C1", 1, 254, 4, 0},
        {499, "GL2C2", 2, 254, 4, 0},
        {500, "GL2C3", 3, 254, 4, 0},
        {501, "GL2C4", 4, 254, 4, 0},
        {502, "GL2C5", 5, 254, 4, 0},
        {503, "GL2C6", 6, 254, 4, 0},
        {504, "GL2C7", 7, 254, 4, 0},
        {505, "GL2C8", 8, 254, 4, 0},
        {506, "GL2C9", 9, 254, 4, 0},
        {507, "GL2C10", 10, 254, 4, 0},
        {508, "GL2C11", 11, 254, 4, 0},
        {509, "GL2C12", 12, 254, 4, 0},
        {510, "GL2C13", 13, 254, 4, 0},
        {511, "GL2C14", 14, 254, 4, 0},
        {512, "GL2C15", 15, 254, 4, 0},
        {513, "CHA", 0, 45, 4, 0},
        {514, "CHC0", 0, 40, 4, 0},
        {515, "CHC1", 1, 40, 4, 0},
        {516, "CHC2", 2, 40, 4, 0},
        {517, "CHC3", 3, 40, 4, 0},
        {518, "CHCG", 0, 40, 4, 0},
        {519, "GUS", 0, 176, 2, 0},
        {520, "GCR", 0, 142, 2, 0},
        {521, "PA_PH", 0, 992, 8, 0},
        {522, "UTCL10", 0, 21, 2, 0},
        {523, "UTCL11", 1, 21, 2, 0},
        {524, "UTCL12", 2, 21, 2, 0},
        {525, "UTCL13", 3, 21, 2, 0},
        {526, "UTCL14", 4, 21, 2, 0},
        {527, "UTCL15", 5, 21, 2, 0},
        {528, "UTCL16", 6, 21, 2, 0},
        {529, "UTCL17", 7, 21, 2, 0},
        {530, "GE2_DIST", 0, 63, 4, 0},
        {531, "GE_SE0", 0, 139, 4, 0},
        {532, "GE_SE1", 1, 139, 4, 0},
        {533, "GE_SE2", 2, 139, 4, 0},
        {534, "GE_SE3", 3, 139, 4, 0},
        {535, "GPUTime", 0, 6, 2, 0},
    };

    GPA_CounterGroupExposedCounterDesc hw_dx12_exposed_counters_by_group_gfx103[] = {
        {0, 0, {0, 24}},
        {1, 40, {8, 14, 21, 54, 55, 56, 57, 61, 62, 73, 74, 105, 109}},
        {2, 316, {8, 14, 21, 54, 55, 56, 57, 61, 62, 73, 74, 105, 109}},
        {3, 592, {8, 14, 21, 54, 55, 56, 57, 61, 62, 73, 74, 105, 109}},
        {4, 868, {8, 14, 21, 54, 55, 56, 57, 61, 62, 73, 74, 105, 109}},
        {5, 1144, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {6, 1722, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {7, 2300, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {8, 2878, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {9, 3456, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {10, 4034, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {11, 4612, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {12, 5190, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
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        {323, 77482, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {324, 77943, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {325, 78404, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {326, 78865, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {327, 79326, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {328, 79787, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {329, 80248, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {330, 80709, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {331, 81170, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {332, 81631, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {333, 82092, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {334, 82553, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {335, 83014, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {336, 83475, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {338, 84059, {0, 2}},
        {351, 84701, {55, 57}},
        {352, 84791, {55, 57}},
        {353, 84881, {55, 57}},
        {354, 84971, {55, 57}},
        {355, 85061, {55, 57}},
        {356, 85151, {55, 57}},
        {357, 85241, {55, 57}},
        {358, 85331, {55, 57}},
        {359, 85421, {55, 57}},
        {360, 85511, {55, 57}},
        {361, 85601, {55, 57}},
        {362, 85691, {55, 57}},
        {363, 85781, {55, 57}},
        {364, 85871, {55, 57}},
        {365, 85961, {55, 57}},
        {366, 86051, {55, 57}},
        {429, 95588, {14, 18}},
        {430, 95671, {14, 18}},
        {431, 95754, {14, 18}},
        {432, 95837, {14, 18}},
        {433, 95920, {14, 18}},
        {434, 96003, {14, 18}},
        {435, 96086, {14, 18}},
        {436, 96169, {14, 18}},
        {437, 96252, {14, 18}},
        {438, 96335, {14, 18}},
        {439, 96418, {14, 18}},
        {440, 96501, {14, 18}},
        {441, 96584, {14, 18}},
        {442, 96667, {14, 18}},
        {443, 96750, {14, 18}},
        {444, 96833, {14, 18}},
        {445, 96916, {14, 18}},
        {446, 96999, {14, 18}},
        {447, 97082, {14, 18}},
        {448, 97165, {14, 18}},
        {449, 97248, {14, 18}},
        {450, 97331, {14, 18}},
        {451, 97414, {14, 18}},
        {452, 97497, {14, 18}},
        {453, 97580, {14, 18}},
        {454, 97663, {14, 18}},
        {455, 97746, {14, 18}},
        {456, 97829, {14, 18}},
        {457, 97912, {14, 18}},
        {458, 97995, {14, 18}},
        {459, 98078, {14, 18}},
        {460, 98161, {14, 18}},
        {497, 99824, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {498, 100078, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {499, 100332, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {500, 100586, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {501, 100840, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {502, 101094, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {503, 101348, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {504, 101602, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {505, 101856, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {506, 102110, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {507, 102364, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {508, 102618, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {509, 102872, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {510, 103126, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {511, 103380, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {512, 103634, {3, 43, 83, 85, 88, 99, 100, 101, 102}},
        {531, 105674, {73, 80, 86, 92, 111}},
        {532, 105813, {73, 80, 86, 92, 111}},
        {533, 105952, {73, 80, 86, 92, 111}},
        {534, 106091, {73, 80, 86, 92, 111}},
        {535, 106230, {0, 1, 2, 3, 4, 5}},
    };

    GPA_PaddedCounterDesc dx12_padded_counter_by_group_gfx103[] = {
    {}
    };

    GPA_SQCounterGroupDesc hw_dx12_sq_groups_gfx103[] = {
        {25, 0, SQ_ALL},
        {26, 1, SQ_ALL},
        {27, 2, SQ_ALL},
        {28, 3, SQ_ALL},
        {29, 0, SQ_ES},
        {30, 1, SQ_ES},
        {31, 2, SQ_ES},
        {32, 3, SQ_ES},
        {33, 0, SQ_GS},
        {34, 1, SQ_GS},
        {35, 2, SQ_GS},
        {36, 3, SQ_GS},
        {37, 0, SQ_VS},
        {38, 1, SQ_VS},
        {39, 2, SQ_VS},
        {40, 3, SQ_VS},
        {41, 0, SQ_PS},
        {42, 1, SQ_PS},
        {43, 2, SQ_PS},
        {44, 3, SQ_PS},
        {45, 0, SQ_LS},
        {46, 1, SQ_LS},
        {47, 2, SQ_LS},
        {48, 3, SQ_LS},
        {49, 0, SQ_HS},
        {50, 1, SQ_HS},
        {51, 2, SQ_HS},
        {52, 3, SQ_HS},
        {53, 0, SQ_CS},
        {54, 1, SQ_CS},
        {55, 2, SQ_CS},
        {56, 3, SQ_CS},
    };


    unsigned int hw_dx12_sq_isolated_groups_gfx103[] = {
        65, // Ta
        66, // Ta
        67, // Ta
        68, // Ta
        69, // Ta
        70, // Ta
        71, // Ta
        72, // Ta
        73, // Ta
        74, // Ta
        75, // Ta
        76, // Ta
        77, // Ta
        78, // Ta
        79, // Ta
        80, // Ta
        81, // Ta
        82, // Ta
        83, // Ta
        84, // Ta
        85, // Ta
        86, // Ta
        87, // Ta
        88, // Ta
        89, // Ta
        90, // Ta
        91, // Ta
        92, // Ta
        93, // Ta
        94, // Ta
        95, // Ta
        96, // Ta
        97, // Ta
        98, // Ta
        99, // Ta
        100, // Ta
        101, // Ta
        102, // Ta
        103, // Ta
        104, // Ta
        105, // Ta
        106, // Ta
        107, // Ta
        108, // Ta
        109, // Ta
        110, // Ta
        111, // Ta
        112, // Ta
        113, // Ta
        114, // Ta
        115, // Ta
        116, // Ta
        117, // Ta
        118, // Ta
        119, // Ta
        120, // Ta
        121, // Ta
        122, // Ta
        123, // Ta
        124, // Ta
        125, // Ta
        126, // Ta
        127, // Ta
        128, // Ta
        129, // Ta
        130, // Ta
        131, // Ta
        132, // Ta
        133, // Ta
        134, // Ta
        135, // Ta
        136, // Ta
        137, // Ta
        138, // Ta
        139, // Ta
        140, // Ta
        141, // Ta
        142, // Ta
        143, // Ta
        144, // Ta
        145, // Td
        146, // Td
        147, // Td
        148, // Td
        149, // Td
        150, // Td
        151, // Td
        152, // Td
        153, // Td
        154, // Td
        155, // Td
        156, // Td
        157, // Td
        158, // Td
        159, // Td
        160, // Td
        161, // Td
        162, // Td
        163, // Td
        164, // Td
        165, // Td
        166, // Td
        167, // Td
        168, // Td
        169, // Td
        170, // Td
        171, // Td
        172, // Td
        173, // Td
        174, // Td
        175, // Td
        176, // Td
        177, // Td
        178, // Td
        179, // Td
        180, // Td
        181, // Td
        182, // Td
        183, // Td
        184, // Td
        185, // Td
        186, // Td
        187, // Td
        188, // Td
        189, // Td
        190, // Td
        191, // Td
        192, // Td
        193, // Td
        194, // Td
        195, // Td
        196, // Td
        197, // Td
        198, // Td
        199, // Td
        200, // Td
        201, // Td
        202, // Td
        203, // Td
        204, // Td
        205, // Td
        206, // Td
        207, // Td
        208, // Td
        209, // Td
        210, // Td
        211, // Td
        212, // Td
        213, // Td
        214, // Td
        215, // Td
        216, // Td
        217, // Td
        218, // Td
        219, // Td
        220, // Td
        221, // Td
        222, // Td
        223, // Td
        224, // Td
        225, // Tcp
        226, // Tcp
        227, // Tcp
        228, // Tcp
        229, // Tcp
        230, // Tcp
        231, // Tcp
        232, // Tcp
        233, // Tcp
        234, // Tcp
        235, // Tcp
        236, // Tcp
        237, // Tcp
        238, // Tcp
        239, // Tcp
        240, // Tcp
        241, // Tcp
        242, // Tcp
        243, // Tcp
        244, // Tcp
        245, // Tcp
        246, // Tcp
        247, // Tcp
        248, // Tcp
        249, // Tcp
        250, // Tcp
        251, // Tcp
        252, // Tcp
        253, // Tcp
        254, // Tcp
        255, // Tcp
        256, // Tcp
        257, // Tcp
        258, // Tcp
        259, // Tcp
        260, // Tcp
        261, // Tcp
        262, // Tcp
        263, // Tcp
        264, // Tcp
        265, // Tcp
        266, // Tcp
        267, // Tcp
        268, // Tcp
        269, // Tcp
        270, // Tcp
        271, // Tcp
        272, // Tcp
        273, // Tcp
        274, // Tcp
        275, // Tcp
        276, // Tcp
        277, // Tcp
        278, // Tcp
        279, // Tcp
        280, // Tcp
        281, // Tcp
        282, // Tcp
        283, // Tcp
        284, // Tcp
        285, // Tcp
        286, // Tcp
        287, // Tcp
        288, // Tcp
        289, // Tcp
        290, // Tcp
        291, // Tcp
        292, // Tcp
        293, // Tcp
        294, // Tcp
        295, // Tcp
        296, // Tcp
        297, // Tcp
        298, // Tcp
        299, // Tcp
        300, // Tcp
        301, // Tcp
        302, // Tcp
        303, // Tcp
        304, // Tcp
    };

    AmdExtGpuBlock hw_dx12_driver_enum_gfx103[] = {
    AmdExtGpuBlock::Cpf,
    AmdExtGpuBlock::Pa,
    AmdExtGpuBlock::Pa,
    AmdExtGpuBlock::Pa,
    AmdExtGpuBlock::Pa,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Spi,
    AmdExtGpuBlock::Spi,
    AmdExtGpuBlock::Spi,
    AmdExtGpuBlock::Spi,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Gds,
    AmdExtGpuBlock::Grbm,
    AmdExtGpuBlock::GrbmSe,
    AmdExtGpuBlock::GrbmSe,
    AmdExtGpuBlock::GrbmSe,
    AmdExtGpuBlock::GrbmSe,
    AmdExtGpuBlock::Rlc,
    AmdExtGpuBlock::Dma,
    AmdExtGpuBlock::Dma,
    AmdExtGpuBlock::Cpg,
    AmdExtGpuBlock::Cpc,
    AmdExtGpuBlock::Atc,
    AmdExtGpuBlock::AtcL2,
    AmdExtGpuBlock::McVmL2,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Rpb,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Ge,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl2a,
    AmdExtGpuBlock::Gl2a,
    AmdExtGpuBlock::Gl2a,
    AmdExtGpuBlock::Gl2a,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Cha,
    AmdExtGpuBlock::Chc,
    AmdExtGpuBlock::Chc,
    AmdExtGpuBlock::Chc,
    AmdExtGpuBlock::Chc,
    AmdExtGpuBlock::Chcg,
    AmdExtGpuBlock::Gus,
    AmdExtGpuBlock::Gcr,
    AmdExtGpuBlock::Ph,
    AmdExtGpuBlock::UtcL1,
    AmdExtGpuBlock::UtcL1,
    AmdExtGpuBlock::UtcL1,
    AmdExtGpuBlock::UtcL1,
    AmdExtGpuBlock::UtcL1,
    AmdExtGpuBlock::UtcL1,
    AmdExtGpuBlock::UtcL1,
    AmdExtGpuBlock::UtcL1,
    AmdExtGpuBlock::GeDist,
    AmdExtGpuBlock::GeSe,
    AmdExtGpuBlock::GeSe,
    AmdExtGpuBlock::GeSe,
    AmdExtGpuBlock::GeSe,
    AmdExtGpuBlock::Count,
    };

    const unsigned int hw_dx12_gputimebottomtobottomduration_index_gfx103 = 106230; ///< Index of delta between the previous command reaching bottom of pipe and the current command reaching bottom of pipe, will not include latency of first data to travel through pipeline, best for large data sets. for dx12 for gfx103 family
    const unsigned int hw_dx12_gputimebottomtobottomstart_index_gfx103 = 106231; ///< Index of time of the previous command reaching bottom of pipe for dx12 for gfx103 family
    const unsigned int hw_dx12_gputimebottomtobottomend_index_gfx103 = 106232; ///< Index of time of the current command reaching bottom of pipe for dx12 for gfx103 family
    const unsigned int hw_dx12_gputimetoptobottomduration_index_gfx103 = 106233; ///< Index of execution duration of the current command from top of pipe to bottom of pipe, may include overhead of time in queue for dx12 for gfx103 family
    const unsigned int hw_dx12_gputimetoptobottomstart_index_gfx103 = 106234; ///< Index of time that the current command reaches the top of pipe for dx12 for gfx103 family
    const unsigned int hw_dx12_gputimetoptobottomend_index_gfx103 = 106235; ///< Index of time that the current command reaches the bottom of pipe for dx12 for gfx103 family
    const std::set<unsigned int> hw_dx12_timestamp_block_ids_gfx103 =       {535}; ///< Timestamp block id's for DX12 for gfx103 family
    const std::set<unsigned int> hw_dx12_time_counter_indices_gfx103 =      {106230, 106231, 106232, 106233, 106234, 106235}; ///< Timestamp counter indices for DX12 for gfx103 family
    const unsigned int           hw_dx12_group_count_gfx103                = sizeof(hw_dx12_groups_gfx103) / sizeof(GPA_CounterGroupDesc);
    const unsigned int           hw_dx12_exposed_counters_group_count_gfx103 = 407;
    const unsigned int           dx12_padded_counter_group_count_gfx103 = 0;
    const unsigned int           hw_dx12_sq_group_count_gfx103              = sizeof(hw_dx12_sq_groups_gfx103) / sizeof(GPA_SQCounterGroupDesc);
    const unsigned int           hw_dx12_sq_isolated_group_count_gfx103      = sizeof(hw_dx12_sq_isolated_groups_gfx103) / sizeof(unsigned int);
} //  namespace counter_dx12_gfx103

// clang-format on
